DocumentCode
1568766
Title
An analytical dynamic scaling of supply voltage and body bias exploiting memory stall time variation
Author
Kim, Jungsoo ; Lee, Younghoon ; Yoo, Sungjoo ; Kyung, Chong-Min
Author_Institution
Dept. of EECS, KAIST, Daejeon, South Korea
fYear
2010
Firstpage
575
Lastpage
580
Abstract
Success of workload prediction, which is critical in achieving low energy consumption via dynamic voltage and frequency scaling (DVFS), depends on the accuracy of modeling the major sources of workload variation. Among them, memory stall time, whose variation is significant especially in case of memory-bound applications, has been mostly neglected or handled in too simplistic assumptions in previous works. In this paper, we present an analytical DVFS method which takes into account variations in both computation and memory stall cycles. The proposed method reduces leakage power consumption as well as switching power consumption through combined Vdd/Vbb scaling. Experimental results on MPEG4 and H.264 decoder have shown that, compared to previous methods and, our method achieves up to additional 30.0% and 15.8% energy reductions, respectively.
Keywords
power aware computing; storage management; analytical dynamic scaling; body bias; dynamic voltage scaling; frequency scaling; leakage power consumption; low energy consumption; memory bound applications; memory stall time variation; supply voltage; switching power consumption; workload prediction; Clocks; Computer architecture; Decoding; Distributed computing; Dynamic voltage scaling; Energy consumption; Frequency; MPEG 4 Standard; Predictive models; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific
Conference_Location
Taipei
Print_ISBN
978-1-4244-5765-6
Electronic_ISBN
978-1-4244-5767-0
Type
conf
DOI
10.1109/ASPDAC.2010.5419820
Filename
5419820
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