Title :
Designing VFs by applying genetic algorithms from nullator-based descriptions
Author :
Tlelo-Cuautle, E. ; Duarte-Villasenor, M.A. ; Reyes-García, C.A. ; Fakhfakh, M. ; Loulou, M. ; Sánchez-López, C. ; Reyes-Salgado, G.
Author_Institution :
INAOE, Puebla
Abstract :
An automatic method is proposed to design CMOS compatible voltage followers (VFs) by applying genetic algorithms. It is described how an automatic system can deals with huge search spaces to design practical VFs by performing evolutionary operations from nullator-based descriptions. The proposed method consists of three main steps: generation of the small-signal circuitry, addition of biases, and sizing by using standard CMOS technology of 0.35 mum. Furthermore, it is described how to synthesize VFs by codifying the three main steps into three kinds of genes, and how to select small-signal, biased, and sized topologies to generate potential solutions. Finally, several applications are discussed along with the evolution of VFs to design current conveyors.
Keywords :
CMOS integrated circuits; active networks; genetic algorithms; operational amplifiers; CMOS technology; genetic algorithm; nullator-based description; size 0.35 micron; voltage follower; Algorithm design and analysis; Analog circuits; Analog computers; CMOS technology; Circuit synthesis; Circuit topology; Electronic design automation and methodology; Genetic algorithms; Space technology; Voltage;
Conference_Titel :
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4244-1341-6
Electronic_ISBN :
978-1-4244-1342-3
DOI :
10.1109/ECCTD.2007.4529656
