DocumentCode
1569078
Title
Digital post-processing for testable random bit generators
Author
Bucci, Marco ; Luzzi, Raimondo
Author_Institution
Infineon Technol. AG, Graz
fYear
2007
Firstpage
623
Lastpage
626
Abstract
In this paper, the problem of estimating the entropy produced by a post-processed random bit generator is discussed. A post-processing algorithm is proposed and a class of suitable sources is defined which includes stateless sources but also chaotic sources, provided that a state-reset function is implemented. It is shown that, using this general scheme of random bit generators, a straightforward procedure to evaluate the actual entropy delivered by a real device can be defined, thus supporting the device validation. The same procedure can be also used in simulation to evaluate the delivered entropy when the source is severely degraded. Finally, an attack scenario is defined and it is shown that it can be considered equivalent to a degraded source. The attack model allows choosing the post-processor compression ratio given the probability of forcing or probing each source output bit.
Keywords
chaos generators; digital signal processing chips; random number generation; chaotic sources; digital post-processing; entropy; post-processed random bit generator; post-processing algorithm; post-processor compression ratio; state-reset function; stateless sources; testable random bit generators; Chaos; Cryptography; Degradation; Entropy; Noise figure; Noise robustness; Random number generation; Signal to noise ratio; Testing; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
Conference_Location
Seville
Print_ISBN
978-1-4244-1341-6
Electronic_ISBN
978-1-4244-1342-3
Type
conf
DOI
10.1109/ECCTD.2007.4529673
Filename
4529673
Link To Document