Title :
A fourth-order feedforward continuous-time delta-sigma ADC with 3MHz bandwidth
Author :
Huang, Sheng-Wen ; Chen, Zong-Yi ; Hung, Chung-Chih ; Chen, Chia-Min
Author_Institution :
Dept. of Electr. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
A fourth-order feedforward continuous-time (CT) delta-sigma modulator is presented. The modulator takes an active-RC OpAmp as the first stage because of the high-linearity requirement, and the other three stages are composed by Gm-C integrators. In feedforward topology, a higher out-of-band NTF gain could be taken for better performance. As we know, the most important part in the feedforward CT ΔΣ modulator is the summation circuit for the feedforward paths. The modulator uses a tuning adder, which we propose, to make sure the modulator can work correctly even under the influence of the process variation on resistors. Finally, the delta-sigma modulator is implemented in standard digital 0.18-μm CMOS process, which achieves 57.84 dB SNDR over a 3MHz signal bandwidth at an OSR of 16.67. The power consumption of the CT delta-sigma modulator is 11.8 mW from the 1.8-V supply.
Keywords :
CMOS integrated circuits; analogue-digital conversion; delta-sigma modulation; feedforward; integrating circuits; network topology; operational amplifiers; CMOS process; Gm-C integrators; active-RC OpAmp; delta-sigma modulator; feedforward continuous-time delta-sigma ADC; feedforward topology; frequency 3 MHz; power 11.8 mW; size 0.18 mum; voltage 1.8 V; Adders; Bandwidth; CMOS process; Circuit optimization; Circuit topology; Delta modulation; Digital modulation; Performance gain; Resistors; Signal processing; continuous-time; delta-sigma; modulator;
Conference_Titel :
Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-7771-5
DOI :
10.1109/MWSCAS.2010.5548554