DocumentCode
1569192
Title
Design methodology of nested-Miller amplifiers for small capacitive loads
Author
Pugliese, Andrea ; Cappuccino, Gregorio ; Cocorullo, Giuseppe
Author_Institution
Dept. of Electron., Univ. of Calabria, Rende
fYear
2007
Firstpage
655
Lastpage
658
Abstract
A novel methodology for designing the compensation network of nested-Miller amplifiers is proposed. Constructing the root contours of the nested structure, the method allows pole positioning to be carried out for small capacitive loads, as occurring in discrete-time applications. At the same time, it allows critical parameters such as the phase margin of the amplifier to be controlled by means of simple analytical expressions. Examples of its application to three-stage schemes are also presented.
Keywords
amplifiers; compensation network; nested-Miller amplifiers; phase margin; small capacitive loads; CMOS technology; Circuits; Computer science; Damping; Design methodology; Linear systems; Operational amplifiers; Parasitic capacitance; Stability; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
Conference_Location
Seville
Print_ISBN
978-1-4244-1341-6
Electronic_ISBN
978-1-4244-1342-3
Type
conf
DOI
10.1109/ECCTD.2007.4529681
Filename
4529681
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