Design of 0.05–5 GHz LNA for Cognitive Radios receiver

Author

Farrag, W. ; Ragheb, A.N. ; Rashid, N.

Author_Institution

Electr. Dept., Al-Azhar Univ., Cairo, Egypt

fYear

2014

fDate

28-30 April 2014

Firstpage

260

Lastpage

264

Abstract

This paper presents a design of Low Noise Amplifier (LNA) for Cognitive Radios (CRs) receiver and it operates from 50 MHz to 5 GHz. The proposed design is consisted of two stages; the first one is a combination of cascode with common gate stage to improve the gain, power consumption, and the input matching. The second stage is a common source (CS) for cancelling the noise and distortion of CG of the first stage. This design achieves a noise figure 4.1-4.8 dB, input reflection coefficient less than -11 dB, output reflection coefficient below -10 dB, the power gain from 10.2 dB to 12.5 dB and the power consumption 7.14 mW supplied from 1 V. The proposed LNA is designed using 0.18 μm CMOS technology.

Keywords

CMOS integrated circuits; UHF amplifiers; cognitive radio; low noise amplifiers; microwave amplifiers; radio receivers; CMOS; LNA; cognitive radios receiver; common source; frequency 0.05 GHz to 5 GHz; gain 10.2 dB to 12.5 dB; input matching; low noise amplifier; noise figure 4.1 dB to 4.8 dB; power 7.14 mW; power consumption; size 0.18 mum; voltage 1 V; CMOS integrated circuits; Educational institutions; Gain; Impedance matching; Low-noise amplifiers; Receivers; Wideband; Cognitive Radios; LNA; common gate; current reuse; noise cancellation;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Science Conference (NRSC), 2014 31st National

Conference_Location

Cairo

Print_ISBN

978-1-4799-3820-9

Type

conf

DOI

10.1109/NRSC.2014.6835084

Filename

6835084