DocumentCode
1569301
Title
Code compression for ARM7 embedded systems
Author
Garofalo, V. ; Napoli, E. ; Petra, N. ; Strollo, A.G.M.
Author_Institution
Dept. of Electron. Eng. & Telecommun., Univ. of Naples, Naples
fYear
2007
Firstpage
687
Lastpage
690
Abstract
A detailed analysis of different code compression algorithms is provided in this paper. The performances of the algorithms have been tested on ARM codes whose size is below 32 KB. Code compression performances have been considered including the compression overheads due to the decoding tables, to the alignment and to the tables for random access to the compressed code. We have analyzed Huffman, Tunstall, LZ77 and Class-based techniques. Optimal performances are provided by Class Based algorithms with an average compression ratio of 64%. For this algorithm we have realized a static decompression engine that provides, after an initial latency of three clock cycles, one 32b instruction for clock cycle.
Keywords
data compression; embedded systems; program processors; reduced instruction set computing; table lookup; ARM7 embedded systems; class based algorithms; clock cycles; code compression algorithms; decoding tables; random access; static decompression engine; Algorithm design and analysis; Clocks; Compression algorithms; Decoding; Delay; Embedded system; Engines; Hardware; Performance evaluation; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
Conference_Location
Seville
Print_ISBN
978-1-4244-1341-6
Electronic_ISBN
978-1-4244-1342-3
Type
conf
DOI
10.1109/ECCTD.2007.4529689
Filename
4529689
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