Title :
Geyser-1: A MIPS R3000 CPU core with fine-grained run-time power gating
Author :
Ikebuchi, D. ; Seki, N. ; Kojima, Y. ; Kamata, M. ; Zhao, L. ; Amano, H. ; Shirai, T. ; Koyama, S. ; Hashida, T. ; Umahashi, Y. ; Masuda, H. ; Usami, K. ; Takeda, S. ; Nakamura, H. ; Namiki, M. ; Kondo, M.
Author_Institution :
Keio Univ., Yokohama, Japan
Abstract :
Geyser-1 is a MIPS CPU which provides a fine-grained run-time power gating (PG) controlled by instructions. Unlike traditional PGs, it uses special standard cells in which the virtual ground (VGND) is separated from the real ground, and a certain number of the sleep transistors are inserted for quick power shut-down and wake-up. In Geyser-1, the fine-grained run-time PG is applied to computational modules in the execution stage. The power shut-down and wakeup are controlled with architectural and software level. This implementation is the first available CPU with this type of run-time PG technique. Geyser-1 has both time and spatial fine-grained PG and works well with a real chip.
Keywords :
microprocessor chips; multichip modules; Geyser-1; MIPS R3000 CPU core; computational modules; fine-grained run-time power gating; power shut-down; sleep transistors; standard cells; virtual ground; Central Processing Unit; Computer aided instruction; Decoding; Energy consumption; Libraries; Logic; Runtime; Sleep; Temperature measurement; Temperature sensors;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-5765-6
Electronic_ISBN :
978-1-4244-5767-0
DOI :
10.1109/ASPDAC.2010.5419857
