DocumentCode
1569472
Title
Dynamic voltage domain assignment technique for low power performance manageable cell based design
Author
Lee, Elone ; Chien, Feng-Tso ; Cheng, Ching-Hwa ; Guo, Jiun-In
Author_Institution
Dept. of Electron. Eng., Feng-Chia Univ., Taichung, Taiwan
fYear
2010
Firstpage
359
Lastpage
360
Abstract
Multi-voltage technique is an effective way to reduce power consumption. In the proposed voltage domain programmable (VDP) technique, high and low voltage domains applied to logic gates are programmable. The different voltage domains allow the chip performance and power consumption to be flexibly adjusted during circuit operation. In this proposed internal of the chip technique, the power switches possess the feature of flexible programming after chip manufacturing. The video decoder test chip proof of this novel methodology has 55% power reduction with good power-performance management mechanism.
Keywords
integrated circuit design; logic circuits; low-power electronics; video codecs; cell based design; dynamic voltage domain assignment technique; flexible programming; logic gates; low power performance; multivoltage technique; power consumption; power switch; video decoder test chip; voltage domain programmable technique; Circuit testing; Delay effects; Design engineering; Energy consumption; Energy management; Logic gates; Logic programming; Power engineering and energy; Rails; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific
Conference_Location
Taipei
Print_ISBN
978-1-4244-5765-6
Electronic_ISBN
978-1-4244-5767-0
Type
conf
DOI
10.1109/ASPDAC.2010.5419864
Filename
5419864
Link To Document