Title :
On signal tracing in post-silicon validation
Author :
Xu, Qiang ; Liu, Xiao
Author_Institution :
Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, Hong Kong, China
Abstract :
It is increasingly difficult to guarantee the first silicon success for complex integrated circuit (IC) designs. Post-silicon validation has thus become an essential step in the IC design flow. Tracing internal signals during circuit´s normal operation, being able to provide real-time visibility to the circuit under debug (CUD), is one of the most effective silicon debug techniques and has gained wide acceptance in industrial designs. Trace-based debug solution, however, involves non-trivial design for debug overhead. How to conduct signal tracing effectively for bug elimination is therefore a challenging task for IC designers. In this paper, we provide in-depth discussion for trace-based debug strategy and review recent advancements in this important area.
Keywords :
design for testability; integrated circuit design; integrated circuit testing; IC design flow; bug elimination; circuit under debug; integrated circuit design; post-silicon validation; signal tracing; silicon debug; trace-based debug; Circuit testing; Computer bugs; Computer science; Design engineering; Design for disassembly; Integrated circuit modeling; Laboratories; Reliability engineering; Signal design; Silicon;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-5765-6
Electronic_ISBN :
978-1-4244-5767-0
DOI :
10.1109/ASPDAC.2010.5419883