Synthesis of threshold logic circuits using tree matching

Threshold logic has been known to be an alternative to Boolean logic for over four decades now. However, due to the lack of efficient circuit implementations, threshold logic did not gain popularity until recently. This change is motivated by new and efficient alternative CMOS implementations for threshold logic and futuristic nano devices like RTDs and SETs which possess inherent threshold properties. This paper motivates the need for threshold logic, and justifies it as an alternative design technique in the post-CMOS era. We present a novel synthesis algorithm for threshold circuits based on tree matching. In comparison with the previous state of the art methods the proposed method demonstrates an improvement of 25% in the number of gates required (max improvement is 50%) and comparable circuit depth.