• DocumentCode
    1570074
  • Title

    FPGA implementation of a new scheme for the circuit realization of PWL functions

  • Author

    Boggiano, Alessio ; Delfitto, Simone ; Poggi, Tomaso ; Storace, Marco

  • Author_Institution
    Biophys. & Electron. Eng. Dept., Univ. of Genoa, Genova
  • fYear
    2007
  • Firstpage
    874
  • Lastpage
    877
  • Abstract
    A new scheme for the circuit realization of multivariate PWL functions is proposed. A three-variate version is implemented on an FPGA board. A comparison with respect to another scheme, already implemented on chip, is provided, showing that the new scheme is more complex, but reduces the computation times. Two benchmark examples are considered to show the high accuracy of the circuit in the representation of PWL functions.
  • Keywords
    field programmable gate arrays; piecewise linear techniques; FPGA implementation; PWL functions; circuit realization; Cellular neural networks; Circuits; Emulation; Field programmable gate arrays; Image processing; Neurons; Nonlinear dynamical systems; Piecewise linear techniques; Voltage; Wireless sensor networks;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
  • Conference_Location
    Seville
  • Print_ISBN
    978-1-4244-1341-6
  • Electronic_ISBN
    978-1-4244-1342-3
  • Type

    conf

  • DOI
    10.1109/ECCTD.2007.4529736
  • Filename
    4529736
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1570074