The programmable protocol VLSI engine (PROVE)

The protocol VLSI engine (PROVE) is a programmable architecture that can be used to implement several standard communication protocols. The architectural features of PROVE, including efficient multiplexing operation with zero-overhead context-switching and support for timer maintenance on multiplexed links, are described. The protocol to be implemented is described in a formal specification language called the Augmented Protocol Specification Language (APSL). From these formal descriptions, a compiler generates microcode for PROVE. PROVE can process 50000 packets/s (with a 10-MHz internal clock) for standard protocols such as LAPD and LLC Class 2. A typical protocol implementation using the PROVE chip set is described. It is compared with other proposals for protocol engines. The first generation of the PROVE chip set has been built and tested