Title :
Complementary logics vs masked logics: Which countermeasure is a better selection?
Author :
Matsumoto, Tsutomu ; Mimura, Hidenobu ; Suzuki, Daisuke
Author_Institution :
Grad. Sch. of Environ. & Inf. Sci., Yokohama Nat. Univ., Yokohama, Japan
Abstract :
In this paper, we focus on comparison between the complementary logics and masked logics as countermeasures against side channel attacks and we develop AES co-processors to which the countermeasures are applied for this purpose. To evaluate the difference that depends on target devices and process, the co-processors are mounted on 130 nm-ASIC, 90 nm-ASIC and FPGA. Through our performance and security evaluation of the circuits, we demonstrate that the complementary and masked logics do not have the difference on the implementation performance but masked logic is advantageous from the viewpoint of side channel security in a semi-custom design flow.
Keywords :
application specific integrated circuits; coprocessors; field programmable gate arrays; integrated logic circuits; logic design; AES co-processor; ASIC; FPGA; circuit security evaluation; complementary logics; masked logics; semicustom design flow; side channel security; size 130 nm; size 90 nm; Logic;
Conference_Titel :
Circuit Theory and Design, 2009. ECCTD 2009. European Conference on
Conference_Location :
Antalya
Print_ISBN :
978-1-4244-3896-9
Electronic_ISBN :
978-1-4244-3896-9
DOI :
10.1109/ECCTD.2009.5274989
