• DocumentCode
    1570607
  • Title

    Ultra low voltage and high speed CMOS carry generate circuits

  • Author

    Berg, Y. ; Mirmotahari, O.

  • Author_Institution
    Dept. of Inf., Univ. of Oslo, Oslo, Norway
  • fYear
    2009
  • Firstpage
    69
  • Lastpage
    72
  • Abstract
    In this paper we present different ultra low-voltage CMOS carry generate circuits. The circuits may operate at supply voltages below the inherent threshold voltage of the transistors while maintaining a current level of transistors operating in strong inversion. The circuits show an improved performance compared to complementary CMOS in terms of delay. Preliminary results indicate a reduced delay to approximately 1/10 of a complementary CMOS design. Simulated data for a ST 90 nm CMOS process are included.
  • Keywords
    CMOS logic circuits; carry logic; high-speed integrated circuits; logic gates; low-power electronics; CMOS carry generate circuits; CMOS design; high speed circuits; semifloating-gate inverter; size 90 nm; ultra low voltage circuits; CMOS logic circuits; CMOS process; Capacitance; Delay; Energy consumption; Inverters; Logic circuits; Low voltage; MOSFETs; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuit Theory and Design, 2009. ECCTD 2009. European Conference on
  • Conference_Location
    Antalya
  • Print_ISBN
    978-1-4244-3896-9
  • Electronic_ISBN
    978-1-4244-3896-9
  • Type

    conf

  • DOI
    10.1109/ECCTD.2009.5274990
  • Filename
    5274990
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1570607