DocumentCode :
1570675
Title :
A PUF design for secure FPGA-based embedded systems
Author :
Anderson, Jason H.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, Canada
fYear :
2010
Firstpage :
1
Lastpage :
6
Abstract :
The concept of having an integrated circuit (IC) generate its own unique digital signature has broad application in areas such as embedded systems security, and IP/IC counter-piracy. Physically unclonable functions (PUFs) are circuits that compute a unique signature for a given IC based on the process variations inherent in the IC manufacturing process. This paper presents the first PUF design specifically targeted for field-programmable gate arrays (FPGAs). Our novel design makes use of the underlying FPGA architecture, and unlike prior published PUFs, the proposed PUF can be naturally embedded into a design\´s HDL, consuming very little area, and does not require the use of "hard macros" with fixed routing. Measured results on the Xilinx Virtex-5 65 nm FPGA demonstrate PUF signatures to be both unique and reliable under temperature variation.
Keywords :
digital signatures; embedded systems; field programmable gate arrays; logic design; IC manufacturing process; IP/IC counter-piracy; PUF design; Xilinx Virtex; digital signature; embedded systems security; feld-programmable gate arrays; fixed routing; hard macros; integrated circuit; physically unclonable functions; secure FPGA-based embedded systems; Application specific integrated circuits; Computer aided manufacturing; Computer architecture; Digital integrated circuits; Digital signatures; Embedded system; Field programmable gate arrays; Manufacturing processes; Physics computing; Security;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-5765-6
Electronic_ISBN :
978-1-4244-5767-0
Type :
conf
DOI :
10.1109/ASPDAC.2010.5419927
Filename :
5419927
Link To Document :
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