Title :
An 8.6mW 12.5Mvertices/s 800MOPS 8.91mm2 Stream Processor Core for Mobile Graphics and Video Applications
Author :
Tsao, You-Ming ; Chang, Chin-Hsiang ; Lin, Yu-Cheng ; Chien, Shao-Yi ; Chen, Liang-Gee
Author_Institution :
Nat. Taiwan Univ., Taipei
Abstract :
An 8.6 mW stream processor core for mobile applications is implemented with 8.91 mm2 area in 0.18 mum CMOS technology at 50 MHz. The adaptive multi-thread architecture with configurable memory array and geometry-content-aware technique are proposed to reduce power consumption while achieving 12.5 Mvertices/s for 3D graphics and motion estimation with search range {H[-24,24),V[-16,16]} for CIF (352times288) 30 fps video encoding.
Keywords :
CMOS memory circuits; computer graphics; microprocessor chips; mobile computing; motion estimation; multi-threading; video coding; 3D mobile graphics; CMOS technology; adaptive multi-thread architecture; configurable memory array; frequency 50 MHz; geometry-content-aware technique; motion estimation; power 8.6 mW; size 0.18 mum; stream processor core; video encoding; Adaptive arrays; CMOS technology; Encoding; Graphics; Hardware; Memory architecture; Pipelines; Registers; Streaming media; Video coding; adaptive multi-thread; configurable memory array and early-rejection-after-transformation; low power GPU; stream processor; vertex shader;
Conference_Titel :
VLSI Circuits, 2007 IEEE Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-900784-05-5
Electronic_ISBN :
978-4-900784-05-5
DOI :
10.1109/VLSIC.2007.4342725
