Title :
Fault tolerant adaptive filters based on arithmetic coding techniques
Author :
Radhakrishnan, C. ; Jenkins, W.K.
Author_Institution :
Dept. of Electr. Eng., Pennsylvania State Univ., University Park, PA, USA
Abstract :
Previous work reported the hybrid combination of a Walsh-Hadamard Transform architecture and Modulus Replication RNS arithmetic to produce a fault tolerant adaptive filter structure (WHT-MRRNS). This paper further analyzes fault tolerant capabilities of the WHT-MRRNS architecture that uses MRRNS coding to provide both RNS (digit) redundancy and PRNS (polynomial) redundancy. Interactions between these two types of redundancy are characterized and strategies are proposed that enable error detection and correction while updating filter coefficients and computing the filter outputs. The proposed fault tolerant architecture relies on MRRNS error correction to eliminate erroneous transient behavior caused by both soft and hard errors.
Keywords :
adaptive filters; arithmetic codes; error correction; error detection; fault tolerance; redundancy; residue number systems; MRRNS coding; PRNS polynomial redundancy; RNS digit redundancy; WHT-MRRNS architecture; Walsh-Hadamard transform architecture; arithmetic coding techniques; error correction; error detection; fault tolerant adaptive filter structure; fault tolerant adaptive filters; fault tolerant architecture; fault tolerant capability; filter coefficients; modulus replication RNS arithmetic; Adaptive filters; Arithmetic; Circuit faults; Computer architecture; Digital signal processing chips; Error correction; Fault tolerance; Integrated circuit reliability; Power system reliability; Redundancy;
Conference_Titel :
Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-7771-5
DOI :
10.1109/MWSCAS.2010.5548650