Title :
An improved method for MOS transistor output conductance
Author :
Jen, Steve H. ; Oshima, Yoichi ; Sheu, Bing
Author_Institution :
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
Abstract :
A single-equation approach as an extension to the EKV MOS transistor model, to realize the drain current modeling characteristics for low-voltage MOS circuits is presented. Instead of three sets of separate equations in the triode, saturation, and weak inversion regions, only a single expression which is valid to describe the drain current behavior in all the transistor operation regions can be realized by using hyperbola and interpolation techniques. Since all the terms and the derivatives in this expression are continuous, this single-equation can predict good results for the current, output conductance, and transconductance with continuous and smooth characteristics
Keywords :
MOS integrated circuits; MOSFET; VLSI; electric admittance; interpolation; mixed analogue-digital integrated circuits; semiconductor device models; EKV MOS transistor model; MOS transistor output conductance; drain current modeling characteristics; hyperbola techniques; interpolation techniques; low-voltage MOS circuits; mixed signal VLSI circuits; single-equation approach; transconductance; transistor operation regions; Analog circuits; Computational complexity; Dynamic range; Equations; Interpolation; MOSFETs; Power supplies; Transconductance; Very large scale integration; Voltage;
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
DOI :
10.1109/ISCAS.1996.541998
