DocumentCode :
1570847
Title :
Differential power analysis of AES ASIC implementations with various S-box circuits
Author :
Sugawara, Takeshi ; Homma, Naofumi ; Aoki, Takafumi ; Satoh, Akashi
Author_Institution :
Grad. Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan
fYear :
2009
Firstpage :
395
Lastpage :
398
Abstract :
Differential power analysis experiments are conducted on various ASIC implementations of AES with different S-box architectures: (i) an inverter over Galois field GF(((22)2)2), (ii) table, (iii) PPRM (positive polarity Reed-Muller forms), and (iv) 3-stage PPRM. Dedicated ASIC is developed and its power is measured on the standard evaluation board SASEBO-R. The results show that the S-box implementations have a significant impact on DPA resistance. The results are also compared with that of FPGA implementations to investigate the difference between the platforms.
Keywords :
Galois fields; Reed-Muller codes; application specific integrated circuits; cryptography; AES ASIC; Galois field; S-box circuit; SASEBO-R; differential power analysis; positive polarity Reed-Muller form; Application specific integrated circuits; Clocks; Energy consumption; Field programmable gate arrays; ISO standards; Information analysis; Inverters; Large scale integration; Power measurement; Public key cryptography;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuit Theory and Design, 2009. ECCTD 2009. European Conference on
Conference_Location :
Antalya
Print_ISBN :
978-1-4244-3896-9
Electronic_ISBN :
978-1-4244-3896-9
Type :
conf
DOI :
10.1109/ECCTD.2009.5275004
Filename :
5275004
Link To Document :
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