Title :
Compiler synthesized dynamic branch prediction
Author :
Mahlke, Scott ; Natarajan, Balas
Author_Institution :
Hewlett-Packard Co., Palo Alto, CA, USA
Abstract :
Branch prediction is the predominant approach for minimizing the pipeline breaks caused by branch instructions. Traditionally, branch prediction is accomplished in one of two ways, static prediction at compile-time via compiler analysis or dynamic prediction at run-time via special hardware structures. In this paper, we propose a novel technique that aims to combine the strengths of the two approaches-the lower cost of compile-time analysis with the effectiveness of dynamic prediction. Specifically, we propose that the compiler use profile feedback to define a prediction function for each branch and insert a few explicit instructions per branch into the compiled code to compute the prediction function. These instructions are carefully selected to predict the direction of the branch using any information available during run-time. A strength of this approach is that information beyond branch history can be used to make predictions, such as the contents of the architectural registers. To substantiate our proposal, we present an algorithm for selecting the prediction instructions, and demonstrate the performance of the approach against contemporary static and dynamic branch prediction strategies
Keywords :
computer architecture; pipeline processing; program compilers; software performance evaluation; branch instructions; branch prediction strategies; compile-time analysis; compiler analysis; dynamic branch prediction; dynamic prediction; pipeline breaks; Computer aided instruction; Costs; Dynamic compiler; Feedback; Hardware; History; Pipelines; Proposals; Registers; Runtime;
Conference_Titel :
Microarchitecture, 1996. MICRO-29.Proceedings of the 29th Annual IEEE/ACM International Symposium on
Conference_Location :
Paris
Print_ISBN :
0-8186-7641-8
DOI :
10.1109/MICRO.1996.566458