Design of CMOS inverter-based output buffers adapting the cherry-hooper broadbanding technique

A methodology for designing CMOS inverter-based output buffers considering speed, gain, jitter, and drivability requirements is presented. In this methodology, the band-broadening technique of the classic Cherry-Hooper amplifier is adapted for CMOS inverters. A buffer designed in this manner offers higher speed than a commonly used simple chain of inverters with exponentially increasing gate widths. The buffer is implemented by making minor modifications to a 4-stage CMOS inverter chain. The proposed design is suitable for output buffers for high-speed CMOS logic circuits.