DocumentCode
1571772
Title
A new transistor clamped 5-level H-bridge multilevel inverter with voltage boosting capacity
Author
Singh, Prashant ; Tiwari, Sunita ; Gupta, K.K.
Author_Institution
Dept. of Electr. & Electron. Eng., Oriental Inst. of Sci. & Technol., Bhopal, India
fYear
2012
Firstpage
1
Lastpage
5
Abstract
Multilevel converters offer high power capability, resulting with lower output harmonics and lower commutation losses. Their main disadvantage is their complexity, requiring a great number of power devices and passive components, and a rather complex control circuitry. This paper presents a new topology of the multilevel inverter with feature like output voltage boosting capability along with capacitor voltage balancing. The proposed multilevel inverter uses transistor clamped H-bridge (TCHB) with an bidirectional switch and four auxillary switches producing a boost output voltage. The single unit of new topology produces five-level output with output voltage double the input DC voltage where as a single unit of conventional H-bridge produces three-level output voltage similar to input DC voltage. The comparison has made between the proposed five-level inverter and conventional cascaded five-level inverter in terms of the output voltage, total harmonic distortion (THD), No. of switching devices used etc. The analysis of the output voltage harmonics is carried out and compared with conventional cascaded H-bridge inverter topology. The proposed multilevel inverter topology is modeled using matlab / simulink. From the results the proposed inverter provides more output voltage.
Keywords
PWM invertors; PWM power convertors; bridge circuits; cascade networks; commutation; harmonic distortion; power semiconductor switches; Matlab-Simulink; TCHB; THD; auxillary switches; bidirectional switch; capacitor voltage balancing; cascaded five-level inverter; commutation loss reduction; five-level inverter; five-level output voltage; input DC voltage; multilevel converters; multilevel inverter topology; output harmonics reduction; output voltage boosting capability; output voltage harmonics analysis; passive components; power devices; three-level output voltage; total harmonic distortion; transistor clamped 5-level H-bridge multilevel inverter; Capacitors; Inverters; Pulse width modulation; Switches; Topology; Voltage control; cascaded H-bridge; cascaded neutral-point clamped inverter; multicarrier pulse width modulation; multilevel inverter; transistor clamped inverter;
fLanguage
English
Publisher
ieee
Conference_Titel
Power India Conference, 2012 IEEE Fifth
Conference_Location
Murthal
Print_ISBN
978-1-4673-0763-5
Type
conf
DOI
10.1109/PowerI.2012.6479576
Filename
6479576
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