DocumentCode :
1571912
Title :
Coefficient optimization for low power realization of FIR filters
Author :
Mehendale, Mahesh ; Sherlekar, S.D. ; Venkatesh, G.
Author_Institution :
Texas Instrum. India Ltd., Bangalore, India
fYear :
1995
Firstpage :
352
Lastpage :
361
Abstract :
In this paper we present an algorithm for optimizing coefficients of a Finite Impulse Response (FTR) filter, so as to reduce power dissipation of its implementation on a programmable Digital Signal Processor. We first identify the sources of power dissipation and show that the power dissipation depends on the total Hamming distance between successive coefficient values. We then present an algorithm that optimizes coefficients so as to minimize this measure. Experimental results on six FIR filter examples show that the coefficient optimization algorithm results in upto 36% reduction in the total Hamming distance. This directly translates into reduction in the power dissipation in the coefficient memory data bus and the multiplier
Keywords :
FIR filters; digital filters; filtering theory; optimisation; FIR filters; coefficient memory data bus; coefficient optimization; digital signal processor; finite impulse response filter; low power realization; multiplier; optimization algorithm; power dissipation reduction; programmable DSP; total Hamming distance; Computer architecture; Computer science; Digital filters; Digital signal processing; Filtering; Finite impulse response filter; Hamming distance; Instruments; Power dissipation; Signal processing algorithms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Signal Processing, VIII, 1995. IEEE Signal Processing Society [Workshop on]
Conference_Location :
Sakai
Print_ISBN :
0-7803-2612-1
Type :
conf
DOI :
10.1109/VLSISP.1995.527506
Filename :
527506
Link To Document :
بازگشت