DocumentCode :
1572060
Title :
Implementation of sample rate conversion in direct RF synthesis transmitter
Author :
Zhao, Yun ; Wang, LiJun ; Xu, JianLiang
Author_Institution :
Sci. & Technol. on Commun. Inf. Security Control Lab., Jiaxing, China
Volume :
2
fYear :
2011
Firstpage :
1021
Lastpage :
1024
Abstract :
In software defined radio (SDR) transmitter, the baseband data with protocol-specific symbol rate should be up-sampled to the fixed sample rate of synthesized carrier by arbitrary sample rate conversion (ASRC), before up-conversion. During the last few years, along with the rapid development of DAC technology, it is possible to implement direct RF synthesis using digital method. This paper presents implementation structure of a two stage SRC in FPGA, which can be used in Direct RF synthesis transmitter to interpolate the baseband data of variable symbol rate to RF sample rate.
Keywords :
field programmable gate arrays; protocols; radio transmitters; software radio; DAC technology; FPGA; RF sample rate; SDR transmitter; arbitrary sample rate conversion; baseband data; direct RF synthesis transmitter; protocol-specific symbol rate; software defined radio; synthesized carrier; variable symbol rate; Laboratories; Radio frequency; Direct RF synthesis transmitter; Polynomial-based Interpolator; SRC;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Cross Strait Quad-Regional Radio Science and Wireless Technology Conference (CSQRWC), 2011
Conference_Location :
Harbin
Print_ISBN :
978-1-4244-9792-8
Type :
conf
DOI :
10.1109/CSQRWC.2011.6037131
Filename :
6037131
Link To Document :
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