• DocumentCode
    1572345
  • Title

    Case studies of model checking for embedded system designs

  • Author

    Chen, Xi ; Hsieh, Harry ; Balarin, Felice ; Watanabe, Yosinori

  • Author_Institution
    California Univ., Riverside, CA, USA
  • fYear
    2003
  • Firstpage
    20
  • Lastpage
    28
  • Abstract
    As modern embedded systems become more integrated and complex, it is crucial to be able to represent systems at multiple levels of abstraction, so that the design space can be effectively explored by successive refinements and abstractions. We present a formal verification methodology and case studies for property verification of designs represented at different abstraction levels. Utilizing Metropolis meta-model (MMM), Y-chart Application Programmer´s Interface (YAPI), an automatic translator, and the model checker SPIN, we verify properties for both system level representations and refined representations.
  • Keywords
    application program interfaces; embedded systems; formal verification; program interpreters; systems analysis; Metropolis meta-model; SPIN model checker; Y-chart Application Programmer Interface; YAPI translator; embedded systems design; formal verification method; Computational modeling; Computer aided software engineering; Computer architecture; Embedded system; Formal verification; Laboratories; Manufactured products; Refining; Space exploration; System analysis and design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application of Concurrency to System Design, 2003. Proceedings. Third International Conference on
  • Print_ISBN
    0-7695-1887-7
  • Type

    conf

  • DOI
    10.1109/CSD.2003.1207696
  • Filename
    1207696