Title :
Multi-bit high-order incremental converters with digital calibration
Author :
Agnes, Andrea ; Maloberti, Franco
Author_Institution :
Dept. of Electron., Univ. of Pavia, Pavia, Italy
Abstract :
Cascade scheme of single order incremental modulators that obtain high-order architectures are studied. The use of high-order obtains a high number of bit with a small number of clock periods. Moreover, it is possible to use multi-bit modulators in the last stages of the chain. The requests of low gain error in the first stages of the cascade are satisfied with an off-line gain mismatch error and digital calibration of result.
Keywords :
calibration; sigma-delta modulation; clock periods; digital calibration; high-order incremental converters; incremental modulators; off-line gain mismatch error; sigma-delta converters; Calibration; Clocks; Digital modulation; Dynamic range; Frequency domain analysis; Linearity; Negative feedback; Operational amplifiers; Tin; Voltage;
Conference_Titel :
Circuit Theory and Design, 2009. ECCTD 2009. European Conference on
Conference_Location :
Antalya
Print_ISBN :
978-1-4244-3896-9
Electronic_ISBN :
978-1-4244-3896-9
DOI :
10.1109/ECCTD.2009.5275089
