DocumentCode
1572605
Title
Data parallel sequential circuit fault simulation
Author
Amin, Minesh B. ; Vinnakota, Bapiraju
Author_Institution
Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
Volume
4
fYear
1996
Firstpage
512
Abstract
Sequential circuit fault simulation is a compute-intensive problem. Parallel simulation is one method to reduce fault simulation time. In this paper, we discuss a novel technique to partition the fault set for the fault parallel simulation of sequential circuits on multiple processors. When applied statically, the technique can scale well for up to thirty two processors on an ethernet. The fault set partitioning technique is simple and can itself be parallelized. Processors working in parallel require no communication with one another. An existing uniprocessor algorithm can be used for parallel simulation without modification. Therefore, this system can be used effectively on a low-cost parallel resource, such as a network of workstations
Keywords
circuit analysis computing; fault diagnosis; logic testing; parallel algorithms; sequential circuits; fault parallel simulation; fault set partitioning technique; fault simulation time reduction; low-cost parallel resource; multiple processors; sequential circuit fault simulation; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer science; Computer simulation; Distributed computing; Logic circuits; Partitioning algorithms; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location
Atlanta, GA
Print_ISBN
0-7803-3073-0
Type
conf
DOI
10.1109/ISCAS.1996.542013
Filename
542013
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