Processing element design for programmable video signal processors

This paper focusses on the architectural design of programmable processing elements (PEs) and shows how technology and circuit parameters influence the structure of the datapath and hence the overall architecture of a programmable video signal processor. We emphasize the need to consider technological and circuit-level issues during the design of a system architecture and present a design methodology whereby the conceptual organization of the PEs-the number of PEs, the pipelining of the datapath, the size of the register file, and the number of register ports-can be evaluated in terms of a target application before a detailed design is undertaken. Motion estimation being an important task in video processing, we use motion estimation as an example to illustrate how various technology parameters affect the architectural design choices