DocumentCode :
1573114
Title :
Power analysis of asynchronous design using charge recycling and push-pull level converter
Author :
Song, Taejoong ; Kim, Stephen ; Lim, Kyutae ; Laskar, Joy
Author_Institution :
ECE Dept., Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
2010
Firstpage :
1270
Lastpage :
1273
Abstract :
An asynchronous charge-recycling (ACR) scheme with a push-pull level converter (PPLC) receiver is proposed. In ACR_PPLC, ACR reduces the dynamic power consumption by reusing the charge, and PPLC limits short circuit current (IS) in the receiver buffer. The simulation shows that ACR_PPLC scheme consumes 20% less power than the normal inverter driver (ID) with the inverter receiver (IR), and ACR with IR. The proposed ACR_PPLC is very effective to apply the charge recycling scheme to the asynchronous design for a low power application.
Keywords :
asynchronous circuits; invertors; power convertors; asynchronous charge recycling; dynamic power consumption; inverter driver; inverter receiver; power analysis; push-pull level converter receiver; receiver buffer; short circuit current; Chromium; Clocks; Driver circuits; Energy consumption; Inverters; Logic; Recycling; Threshold voltage; Timing; Transient analysis; asynchronous charge recycling; low power; push-pull level converter; short current reduction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on
Conference_Location :
Seattle, WA
ISSN :
1548-3746
Print_ISBN :
978-1-4244-7771-5
Type :
conf
DOI :
10.1109/MWSCAS.2010.5548762
Filename :
5548762
Link To Document :
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