High fMAX/fT ratio in multi-finger embedded T-shaped gate graphene transistors

Remarkable progress has been made in both graphene RF transistor level [1] and the circuit level [2]. Despite the demonstrated high current gain cutoff frequency (f_T), most devices also show significantly lower maximum oscillation frequency (f_MAX), which is a crucial figure of merit that really determines the device performance in most RF circuits. It is well known that gate resistance (R_g) plays a key role in deciding f_MAX, and T-shaped gate structures have been adopted in semiconductor industries for very high-speed RF transistor designs by maximizing the cross-sectional area of the gate. This paper presents an embedded T-gate graphene FET structure. With merely 1 V drain bias, extrinsic f_MAX up to 20 GHz, and about 25% to 55% higher than f_T, is achieved from devices with a channel length down to 250 nm. Besides the same key advantage of the embedded gate - bypassing the use of seed layers for obtaining ultra-high quality gate dielectrics [3], this new structure also provides uncomplicated process flow, low parasitic capacitance, and simple circuit wiring.