• DocumentCode
    1574150
  • Title

    Optimization for a superscalar out-of-order machine

  • Author

    Holler, Anne M.

  • Author_Institution
    Hewlett-Packard Co., USA
  • fYear
    1996
  • Firstpage
    336
  • Lastpage
    348
  • Abstract
    Compiler optimization plays a key role in unlocking the performance of the PA-8000, an innovative dynamically-scheduled machine which is the first implementation of the 64-bit PA 2.0 member of the HP PA-RISC architecture family. This wide superscalar, long out-of-order machine provides significant execution bandwidth and automatically hides latency at runtime; however despite its ample hardware resources, many of the optimizing transformations which proved effective for the PA-8000 served to augment its ability to exploit the available bandwidth and to hide latency. Further machine-specific factors influenced all levels of optimization to a degree without precedent in the set of previous PA-RISC processors. While legacy codes benefit from the PA-8000´s sophisticated hardware, recompilation of old binaries can be vital to realizing the full potential of the PA-8000, given the impact of new compilers in achieving peak performance for this machine
  • Keywords
    Hewlett Packard computers; computer architecture; fault tolerant computing; optimising compilers; performance evaluation; HP PA-RISC architecture; PA-8000; compiler optimization; dynamically-scheduled machine; machine-specific factors; peak performance; performance; recompilation; superscalar out-of-order machine; Bandwidth; Delay; Dynamic scheduling; Hardware; Microprocessors; Optimizing compilers; Out of order; Processor scheduling; Reduced instruction set computing; Runtime;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture, 1996. MICRO-29.Proceedings of the 29th Annual IEEE/ACM International Symposium on
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-7641-8
  • Type

    conf

  • DOI
    10.1109/MICRO.1996.566473
  • Filename
    566473