DocumentCode :
1574245
Title :
Optimization of staggered heterojunction p-TFETs for LSTP and LOP applications
Author :
Baravelli, E. ; Gnani, Elena ; Grassi, Roberto ; Gundi, A. ; Baccarani, G.
Author_Institution :
ARCES, Univ. of Bologna, Bologna, Italy
fYear :
2013
Firstpage :
67
Lastpage :
68
Abstract :
Effect of transverse quantization on the broken vs. staggered band lineup of InAs/AlxGa1-xSb TFETs is investigated, showing that cross-sections up to 10nm lead to staggered configurations for any value of the Al mole fraction x. Device performance is optimized as a function of cross-sectional size, Al content and possible source/channel underlap, while ensuring low standby power (LSTP) or low operating power (LOP) compatible off-current levels. Guidelines are provided and an “optimal” design is proposed which provides a minimum sub-threshold slope (SS) of 7.2 mV/dec along with a maximum on-state current (IOn) of 175μA/μm.
Keywords :
III-V semiconductors; aluminium compounds; field effect transistors; gallium compounds; indium compounds; optimisation; semiconductor heterojunctions; tunnel transistors; InAs-AlxGa1-xSb; LOP application; LSTP application; low operating power; low standby power; minimum subthreshold slope; off current level; staggered heterojunction p-TFET; transverse quantization effect; Degradation; Heterojunctions; Logic gates; Materials; Performance evaluation; Quantization (signal); Scattering;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Device Research Conference (DRC), 2013 71st Annual
Conference_Location :
Notre Dame, IN
ISSN :
1548-3770
Print_ISBN :
978-1-4799-0811-0
Type :
conf
DOI :
10.1109/DRC.2013.6633796
Filename :
6633796
Link To Document :
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