A 50 nm gate length InN tri-gate FET design with gm of 1.07 mS/μm and ft of 495 GHz

Among III-N semiconductors, InN has long been attractive for high-frequency devices because of its predicted high electron velocity (> 3 × 10⁷ cm/s) and low effective mass [1]. However, experimental devices have been hard to demonstrate due to high n-type unintentional doping densities (UID) (> 10¹⁷ cm^-3) and large surface conduction. In this work, through comprehensive simulation, we show that through judicious design of a tri-gate InN device and polarization engineering, a FET operation is realized even with high UID. The simulated 50 nm gate length device shows excellent DC and RF performance with calculated values of g_m 1.07 mS/μm, f_t 495 GHz, intrinsic f_max 760 GHz, and off state current of 0.007 mA/ μm.