A two-stage amplifier with the recycling folded cascode input-stage and feedforward stage

Author

Qianneng, Zhou ; Hongjuan, Li ; Xiaozhong, Duan ; Chong, Yang

Author_Institution

Coll. of Electron. Eng., Chongqing Univ. of Posts & Telecommun., Chongqing, China

Volume

2

fYear

2011

Firstpage

1557

Lastpage

1560

Abstract

This paper presents a high-gain wide-bandwidth two-stage amplifier. By adopting the recycling folded cascode input-stage, a damping-factor-control frequency compensation (DFC) and a feedforward stage, the designed two-stage amplifier achieves well performance such as the gain-bandwidth product (GWB) and the slew rate (SR). The two-stage amplifier has been designed in a standard 0.5μm CMOS process and is simulated using a 3-V power supply and a 25-kΩ//100-pF load. Simulation results show that the designed two-stage amplifier achieved a DC gain of about 100dB, GWB of 26.6MHz with 60.1° phase margin and SR+/SR-=24.4/13.35-V/μs.

Keywords

CMOS analogue integrated circuits; DC amplifiers; damping; feedforward amplifiers; frequency control; power factor; power supply circuits; CMOS process; capacitance 100 pF; damping factor control frequency compensation; feedforward stage; frequency 26.6 MHz; gain-bandwidth product; high gain wide bandwidth two stage amplifier; phase margin; power supply; recycling folded cascode input stage; resistance 25 kohm; slew rate; voltage 3 V; Solids; Time frequency analysis; feedforward; frequency compensation; recycling folded cascode; two-stage amplifier;

fLanguage

English

Publisher

ieee

Conference_Titel

Cross Strait Quad-Regional Radio Science and Wireless Technology Conference (CSQRWC), 2011

Conference_Location

Harbin

Print_ISBN

978-1-4244-9792-8

Type

conf

DOI

10.1109/CSQRWC.2011.6037269

Filename

6037269