• DocumentCode
    1575726
  • Title

    Design considerations for FE-charge DRAM-Flash hybrid memory

  • Author

    Auluck, Kshitij ; Rajwade, Shantanu R. ; Kan, Edwin C.

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA
  • fYear
    2013
  • Firstpage
    177
  • Lastpage
    178
  • Abstract
    Following experimental verification and parameter extraction of fast program DRAM-mode and long retention Flash-mode in ferroelectric (FE)-charge hybrid memory, we present the design considerations on memory window, and program/erase/retention dynamics from geometry and material parameters. The achievable dual-mode design trade-offs are then implemented in array circuits.
  • Keywords
    DRAM chips; ferroelectric storage; flash memories; logic design; DRAM-mode; FE-charge hybrid memory; dual-mode design trade-offs; experimental verification; ferroelectric-charge hybrid memory; flash-mode; geometry parameters; material parameters; memory window; parameter extraction; program-erase-retention dynamics; Arrays; Capacitors; Iron; Kinetic theory; Logic gates; Random access memory; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Device Research Conference (DRC), 2013 71st Annual
  • Conference_Location
    Notre Dame, IN
  • ISSN
    1548-3770
  • Print_ISBN
    978-1-4799-0811-0
  • Type

    conf

  • DOI
    10.1109/DRC.2013.6633851
  • Filename
    6633851
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1575726