Digitally-controlled automatic gain control circuits for CMOS CCD electronic cameras

This paper describes automatic gain control circuit (AGC) design techniques for CMOS CCD camera interface systems. The required gain of the proposed AGC is controlled directly by digital bits without conventional extra digital-to-analog converters. The amplifying function of the AGC is divided into three stages for high-speed operation. A capacitor-segment combination technique considerably improves the effective bandwidth of the AGC. The prototype implemented in a 0.5 μm n-well CMOS process shows the 32-dB AGC dynamic range in 1/8-dB steps with 173 mW at 3 V and 25 MHz. A two-stage AGC is proposed to reduce power and chip area further