An integrated CDMA intermediate-frequency transceiver for 10-MHz wireless local loop

This paper describes a 10-MHz bandwidth WLL (Wireless Local Loop) intermediate frequency (IF) transceiver integrated circuit. The chip interfaces between the RF (radio frequency) and the digital modem sections, and performs the IF-to-baseband (Rx) and baseband-to-IF (Tx) frequency conversions. It incorporates two 100-dB VGAs (variable gain amplifiers), two fixed-frequency PLLs, four low pass filters, two 4-bit A/D converters and two 10-bit D/A converters. It has been implemented in a 0.6-μm silicon CMOS process. The PLLs include the VCOs, dividers, phase detectors, and charge pump circuits on chip. The only external requirements are the varactor-tuned LC tank circuit and PLL loop filter circuit. Total supply current is about 57 mA at 3.0-5.0 V