Title :
A top down design environment for data-path design [FIR filter]
Author :
Yamazaki, Takao ; Kondo, Yoshihito
Author_Institution :
Sony Corp. Res. Lab., Tokyo, Japan
Abstract :
A top-down data-path design environment is discussed in four major aspects: the design entry, simulation, synthesis, and optimization. A new design environment based on enhanced Verilog-HDL and the data-path library is proposed for the inner-product circuit design. An example of a 20 K gate digital filter design demonstrates the efficiency in the design period and design optimization
Keywords :
FIR filters; digital filters; hardware description languages; high level synthesis; video signal processing; FIR filter; data-path design; design entry; digital filter design; enhanced Verilog-HDL; inner-product circuit design; optimization; parametric module library; simulation; synthesis; top down design environment; video signal processing; Arithmetic; Circuit simulation; Circuit synthesis; Design optimization; Equations; Finite impulse response filter; Hardware design languages; Large scale integration; Logic design; Signal design;
Conference_Titel :
ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-1375-5
DOI :
10.1109/ASIC.1993.410719
