• DocumentCode
    157806
  • Title

    Improving cache performance using read-write partitioning

  • Author

    Khan, Sharifullah ; Alameldeen, Alaa R. ; Wilkerson, Chris ; Mutluy, Onur ; Jimenezz, Daniel A.

  • Author_Institution
    Carnegie Mellon Univ., Pittsburgh, CA, USA
  • fYear
    2014
  • fDate
    15-19 Feb. 2014
  • Firstpage
    452
  • Lastpage
    463
  • Abstract
    Cache read misses stall the processor if there are no independent instructions to execute. In contrast, most cache write misses are off the critical path of execution, since writes can be buffered in the cache or the store buffer. With few exceptions, cache lines that serve loads are more critical for performance than cache lines that serve only stores. Unfortunately, traditional cache management mechanisms do not take into account this disparity between read-write criticality. This paper proposes a Read-Write Partitioning (RWP) policy that minimizes read misses by dynamically partitioning the cache into clean and dirty partitions, where partitions grow in size if they are more likely to receive future read requests. We show that exploiting the differences in read-write criticality provides better performance over prior cache management mechanisms. For a single-core system, RWP provides 5% average speedup across the entire SPEC CPU2006 suite, and 14% average speedup for cache-sensitive benchmarks, over the baseline LRU replacement policy. We also show that RWP can perform within 3% of a new yet complex instruction-address-based technique, Read Reference Predictor (RRP), that bypasses cache lines which are unlikely to receive any read requests, while requiring only 5.4% of RRP´s state overhead. On a 4-core system, our RWP mechanism improves system throughput by 6% over the baseline and outperforms three other state-of-the-art mechanisms we evaluate.
  • Keywords
    cache storage; critical path analysis; RRP; cache management; cache performance; critical path; read reference predictor; read-write partitioning; single-core system; store buffer; Benchmark testing; Buffer storage; Educational institutions; Memory management; Prediction algorithms; Resource management; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computer Architecture (HPCA), 2014 IEEE 20th International Symposium on
  • Conference_Location
    Orlando, FL
  • Type

    conf

  • DOI
    10.1109/HPCA.2014.6835954
  • Filename
    6835954