Title :
Improving in-memory database index performance with Intel® Transactional Synchronization Extensions
Author :
Karnagel, Tomas ; Dementiev, Roman ; Rajwar, Ravi ; Lai, Koonchun ; Legler, Thomas ; Schlegel, Benoit ; Lehner, Wolfgang
Author_Institution :
Intel Corp., Munich, Germany
Abstract :
The increasing number of cores every generation poses challenges for high-performance in-memory database systems. While these systems use sophisticated high-level algorithms to partition a query or run multiple queries in parallel, they also utilize low-level synchronization mechanisms to synchronize access to internal database data structures. Developers often spend significant development and verification effort to improve concurrency in the presence of such synchronization. The Intel® Transactional Synchronization Extensions (Intel® TSX) in the 4th Generation Core™ Processors enable hardware to dynamically determine whether threads actually need to synchronize even in the presence of conservatively used synchronization. This paper evaluates the effectiveness of such hardware support in a commercial database. We focus on two index implementations: a B+Tree Index and the Delta Storage Index used in the SAP HANA® database system. We demonstrate that such support can improve performance of database data structures such as index trees and presents a compelling opportunity for the development of simpler, scalable, and easy-to-verify algorithms.
Keywords :
concurrency control; data structures; database management systems; multi-threading; transaction processing; 4th generation Core processors; B+Tree index; Intel transactional synchronization extensions; SAP HANA database system; concurrency improvement; conservatively used synchronization; delta storage index; development effort; hardware support; high-performance in-memory database systems; in-memory database index performance improvement; index implementations; index trees; internal database data structures; low-level synchronization mechanisms; query partitioning; sophisticated high-level algorithms; threads; verification effort; Dictionaries; Hardware; Indexes; Program processors; Sockets; Synchronization;
Conference_Titel :
High Performance Computer Architecture (HPCA), 2014 IEEE 20th International Symposium on
Conference_Location :
Orlando, FL
DOI :
10.1109/HPCA.2014.6835957