Title :
A design of 2-D DCT/IDCT for real-time video applications
Author :
Kim, Ig-kyun ; Cha, Jin-Jong ; Cho, Han-Jin
Author_Institution :
Micro-Electron. Tech. Lab., ETRI, Taejeon, South Korea
fDate :
6/21/1905 12:00:00 AM
Abstract :
In this paper, we present the implementation of the 2-D DCT/IDCT that is capable of processing an 8×8 pixel block and satisfies the accuracy specification of ITU-T. This circuit was designed for real-time processing of 33 MHz sample rate video data. It uses row-column decomposition to implement a two dimensional transform. Distributed arithmetic combined with bit-serial and bit-parallel structures is used to implement the required vector inner product concurrently. The resultant circuit only uses memory and shift registers, and adders. No multipliers are required. The circuit has been laid out using a 0.5 μm CMOS technology, and contains 10000 gates approximately and 64×16 bit memory
Keywords :
CMOS digital integrated circuits; VLSI; digital signal processing chips; discrete cosine transforms; distributed arithmetic; real-time systems; transform coding; video coding; 0.5 micron; 2D DCT; 2D IDCT; 33 MHz; CMOS technology; ITU-T accuracy specification; VLSI architecture; bit-parallel structures; bit-serial structures; distributed arithmetic; real-time processing; real-time video applications; row-column decomposition; two dimensional transform; vector inner product; Adders; Arithmetic; CMOS technology; Circuits; Discrete Fourier transforms; Discrete cosine transforms; Equations; Process design; Shift registers; Very large scale integration;
Conference_Titel :
VLSI and CAD, 1999. ICVC '99. 6th International Conference on
Conference_Location :
Seoul
Print_ISBN :
0-7803-5727-2
DOI :
10.1109/ICVC.1999.820999
