DocumentCode :
1578277
Title :
Performance and interface buffer size driven behavioral partitioning for embedded systems
Author :
Lin, Ta-Cheng ; Sait, Sadiq M. ; Cyre, Walling R.
Author_Institution :
IBM Corp., Austin, TX, USA
fYear :
1998
Firstpage :
116
Lastpage :
121
Abstract :
One of the major differences in partitioning for co-design is in the way the communication cost is evaluated. Generally, the size of the edge cut-set is used. When communication between components is through buffered channels, the size of the edge cut-set is not adequate to estimate the buffer size. A second important factor to measure the quality of partitioning is the system delay. Most partitioning approaches use the number of nodes/functions in each partition as constraints and attempt to minimize the communication cost. The data dependencies among nodes/functions and their delays are not considered. In this paper, we present partitioning with two objectives: (1) buffer size, which is estimated by analyzing the data flow patterns of the control data flow graph (CDFG) and solved as a clique partitioning problem, and (2) the system delay that is estimated using list scheduling. We pose the problem as a combinatorial optimization and use an efficient non-deterministic search algorithm, called the problem-space genetic algorithm, to search for the optimum. Experimental results indicate that, according to a proposed quality metric, our approach can attain an average 87% of the optimum for two-way partitioning
Keywords :
buffer storage; combinatorial mathematics; data flow graphs; delays; genetic algorithms; high level synthesis; list processing; logic partitioning; performance evaluation; real-time systems; scheduling; search problems; software prototyping; behavioral partitioning; buffered channels; clique partitioning problem; codesign; combinatorial optimization; communication cost evaluation; control data flow graph; data dependencies; data flow patterns; edge cut-set size; embedded systems; interface buffer size estimation; list scheduling; nondeterministic search algorithm; optimum searching; performance; problem-space genetic algorithm; quality metric; system delay estimation; two-way partitioning; Communication system control; Control systems; Cost function; Data analysis; Delay estimation; Delay systems; Flow graphs; Partitioning algorithms; Pattern analysis; Size control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Rapid System Prototyping, 1998. Proceedings. 1998 Ninth International Workshop on
Conference_Location :
Leuven
ISSN :
1074-6005
Print_ISBN :
0-8186-8479-8
Type :
conf
DOI :
10.1109/IWRSP.1998.676679
Filename :
676679
Link To Document :
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