DocumentCode
157829
Title
Scalably verifiable dynamic power management
Author
Matthews, Opeoluwa ; Meng Zhang ; Sorin, Daniel J.
Author_Institution
Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
fYear
2014
fDate
15-19 Feb. 2014
Firstpage
579
Lastpage
590
Abstract
Dynamic power management (DPM) is critical to maximizing the performance of systems ranging from multicore processors to datacenters. However, one formidable challenge with DPM schemes is verifying that the DPM schemes are correct as the number of computational resources scales up. In this paper, we develop a DPM scheme such that it is scalably verifiable with fully automated formal tools. The key to the design is that the DPM scheme has fractal behavior; that is, it behaves the same at every scale. We show that the fractal design enables scalable formal verification and simulation shows that our scheme does not sacrifice much performance compared to an oracle DPM scheme that optimally allocates power to computational resources. We implement our scheme in a 2-socket 16-core x86 system and experimentally evaluate it.
Keywords
fractals; microprocessor chips; multiprocessing systems; power aware computing; resource allocation; 2-socket 16-core x86 system; computational resources; datacenters; fractal behavior; fractal design; fully automated formal tools; multicore processors; oracle DPM scheme; scalably verifiable dynamic power management; Abstracts; Automata; Computational modeling; Computers; Fractals; Multicore processing; Program processors;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computer Architecture (HPCA), 2014 IEEE 20th International Symposium on
Conference_Location
Orlando, FL
Type
conf
DOI
10.1109/HPCA.2014.6835967
Filename
6835967
Link To Document