Title :
Design of Asynchronous Circuits on FPGAs for Soft Error Tolerance
Author :
Bai, Yu ; Kuang, Weidong
Author_Institution :
Dept. of Electr. Eng., Univ. of Texas- Pan American, Edinburg, TX, USA
Abstract :
In this paper, we investigate the mechanism of soft error generation, propagation in asynchronous circuits which are implemented on FPGA. We also proposed the circuit to detect the soft errors which propagate in asynchronous Pipelines. The effects of the soft errors on Quasi-delay-insensitive (QDI) asynchronous circuits are analyzed and detected. The simulation results show that the proposed detect circuit can detect the soft error in asynchronous circuits implemented on FPGAs easily so that FPGAs can be reprogrammed, compared with traditional synchronous circuits.
Keywords :
asynchronous circuits; field programmable gate arrays; logic design; FPGA; asynchronous circuit design; asynchronous pipelines; quasidelay-insensitive asynchronous circuits; soft error tolerance; Asynchronous circuits; Field programmable gate arrays; Fires; Logic gates; Pipelines; System recovery; Table lookup; FPGA; asynchronous circuit; detection circuit; soft error;
Conference_Titel :
Digital System Design (DSD), 2011 14th Euromicro Conference on
Conference_Location :
Oulu
Print_ISBN :
978-1-4577-1048-3
DOI :
10.1109/DSD.2011.35
