Experiences with an HDL-based design method for complex architectures

Author

Cochlovius, Elmar ; Golze, Ulrich ; Schafers, M. ; Wachsmann, Klaus-Peter

Author_Institution

Dept. of Design of Integrated Circuits, Tech. Univ. of Braunschweig, Germany

fYear

1993

Firstpage

297

Lastpage

300

Abstract

Two RISC microprocessors have been designed to improve the design method and to study its effect on the design of complex architectures. The method is presented, and some key issues are identified. They include HDL-based modeling rules, supplementary high-level specification with statecharts, the notion of behavioral and structural similarity, and a consistent test strategy

Keywords

application specific integrated circuits; hardware description languages; high level synthesis; microprocessor chips; parallel architectures; reduced instruction set computing; HDL-based design method; RISC microprocessors; behavioral similarity; complex architectures; consistent test strategy; control oriented ASIC architectures; design flow; modeling rules; parallel complexity; statecharts; structural similarity; supplementary high-level specification; Application specific integrated circuits; Circuit faults; Design methodology; Graphics; Hardware design languages; Large scale integration; Microprocessors; Process design; Reduced instruction set computing; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International

Conference_Location

Rochester, NY

Print_ISBN

0-7803-1375-5

Type

conf

DOI

10.1109/ASIC.1993.410726

Filename

410726