Title :
Configurable two-dimensional linear feedback shifter registers for built-in self-test
Author :
Chen, Chien-In Henry ; George, Kiran
Author_Institution :
Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA
Abstract :
A configurable 2D LFSR based test generator and an automated synthesis procedure is presented. Without storage of test patterns, a 2D LFSR based test pattern generator can generate a sequence of pre-computed test patterns (detecting random-pattern-resistant faults) and followed by random patterns (detecting random-pattern-detectable). The hardware overhead is decreased considerably through configuration. The configurable 2D LFSR test generator can be adopted in two basic BIST execution options: test-per-clock (parallel BIST) and test-per-scan (serial BIST). Experimental results of test-per-clock and test-per-scan BIST of benchmark circuits demonstrate the effectiveness of the proposed technique. The configurable 2D LFSR can also be adopted in chip-level and system-on-chip (SoC) BIST.
Keywords :
analogue integrated circuits; automatic test pattern generation; benchmark testing; built-in self test; design for testability; shift registers; 2D LFSR based test generator; automated synthesis; benchmark circuits; built-in self-test; chip-level BIST; configurable two-dimensional shifter registers; parallel BIST; pre-computed test patterns; random patterns; random-pattern-detectable faults; random-pattern-resistant faults; serial BIST; system-on-chip BIST; test pattern generator; test-per-clock BIST; test-per-scan BIST; Automatic testing; Benchmark testing; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Feedback; Hardware; Test pattern generators;
Conference_Titel :
Instrumentation and Measurement Technology Conference, 2003. IMTC '03. Proceedings of the 20th IEEE
Print_ISBN :
0-7803-7705-2
DOI :
10.1109/IMTC.2003.1207987
