Title :
Efficient CRT RSA with SCA Countermeasures
Author :
Fournaris, Apostolos P. ; Koufopavlou, Odysseas
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of Patras, Patra, Greece
Abstract :
RSA cryptographic algorithm, working as a security tool for many years, has long achieved cryptographic and market maturity. However, as all crypto algorithms, RSA implementations, after the discovery and wide spread of Side Channel Attacks (SCA), are susceptible to a wide variety of different attacks that target the hardware structure rather than the algorithm itself. While there are a wide range of countermeasures that can be applied on the RSA structure in order to protect the algorithm from SCAs, combining several such measures in order to guarantee an SCA resistant RSA design is not an easy job. There are many incompatibility issues among SCA protection methods as well as an extensive performance cost added to an SCA secure RSA implementation. In this paper, we address some very popular and potent SCAs against RSA like Fault attacks (FA), Simple Power attacks (SPA), Doubling attacks (DA) and Differential Power attacks (DPA), and propose an algorithmic modification of RSA based on Chinese Remainder Theorem (CRT) that can thwart those attacks. We describe an implementation approach based on Montgomery modular multiplication and propose a hardware architecture for a SCA resistant CRT RSA that is structured on our proposed algorithm. The designed architecture is implemented in FPGA technology and results on its time and space complexity are extracted and evaluated.
Keywords :
public key cryptography; Chinese remainder theorem; Montgomery modular multiplication; RSA cryptographic algorithm; differential power attacks; doubling attacks; fault attacks; hardware architecture; incompatibility issues; public key cryptography; security tool; side channel attacks; simple power attacks; Algorithm design and analysis; Computer architecture; Cryptography; Hardware; Registers; Resistance; Modular Exponentiation; Public Key Cryptography; Side Channel Attack Resistance; VLSI Design;
Conference_Titel :
Digital System Design (DSD), 2011 14th Euromicro Conference on
Conference_Location :
Oulu
Print_ISBN :
978-1-4577-1048-3
DOI :
10.1109/DSD.2011.81