DocumentCode :
1579748
Title :
Scaling Up the Formal Verification of Lustre Programs with SMT-Based Techniques
Author :
Hagen, George ; Tinelli, Cesare
Author_Institution :
Dept. of Comput. Sci., Iowa Univ., Iowa City, IA
fYear :
2008
Firstpage :
1
Lastpage :
9
Abstract :
We present a general approach for verifying safety properties of Lustre programs automatically. Key aspects of the approach are the choice of an expressive first-order logic in which Lustre´s semantics is modeled very naturally, the tailoring to this logic of SAT-based k-induction and abstraction techniques, and the use of SMT solvers to reason efficiently in this logic. We discuss initial experimental results showing that our implementation of the approach is highly competitive with existing verification solutions for Lustre.
Keywords :
computability; parallel programming; program verification; Lustre program; Lustre semantics; SAT-based k-induction; SMT-based technique; abstraction technique; first-order logic; formal verification; safety property; satisfiability modulo theory; Arithmetic; Computer science; Embedded system; Formal verification; Logic; Manufacturing industries; Safety; Software tools; Specification languages; Surface-mount technology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Formal Methods in Computer-Aided Design, 2008. FMCAD '08
Conference_Location :
Portland, OR
Print_ISBN :
978-1-4244-2735-2
Electronic_ISBN :
978-1-4244-2736-9
Type :
conf
DOI :
10.1109/FMCAD.2008.ECP.19
Filename :
4689178
Link To Document :
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