Analytical predictions of thermal stress in MOSFETs

The present work contains a discussion of finite-element stress analyses of NMOS devices performed in support of an experimental study of VLSI device reliability. The purpose of the experimental study is to examine the effects of varying line geometry on device performance parameters such as threshold voltage, source-drain breakdown, and substrate current. The purpose of the analytical work is to characterize the residual thermal stresses in the devices for correlation with experimental reliability measurements. The devices consist of a silicon substrate underlying a thermally grown gate oxide, with a polysilicon line structure encapsulated by low-temperature oxide. Plane stress analyses of devices with three line thicknesses were performed. An analogous three-dimensional analysis was performed of one of the plane stress cases in order to show the effect of the plane stress assumption on calculated results. A three-dimensional analysis of the encapsulated structure also was performed. Results indicate that residual stresses in the substrate and gate oxide due to thermal processing are probably high enough to cause degradation or failure of the devices